Products: Network Controllers

S1S65010

This product S1S65010 is best network camera controller IC because it composes the Internet camera.

The basic function of S1S65000 improves the function of the support of frame rate (30fps@VGA), the resolution (maximum UXGA), voice/audio data by I2S, and etc. as it is in addition, and supports the Internet camera more strongly.

For more information on imagecontroller such as information on documents and application notes, visit the imagecontroller Users' Site.

Image Controllers User's Site
  • S1S65010

Block diagram

Expansion image of block diagram

Block diagram
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Main specification

  • The function of the Internet camera is achieved without PC.
  • It corresponds to various camera modules up to maximum VGA size.
  • It compresses it into the JPEG form with the JPEG encoder.
  • The JPEG encode table can be rewritten. (quantization and AC/DC table)
  • General purpose I/O pin and the I2C bus can control peripherals from the network.
  • Various control settings are possible from the network.
  • The image can be sent by E-mail.
  • The power saving is possible according to a regular the re-start/stop with the timer etc.
  • The access limitation can be set by the password function.
  • Possible for wireless LAN interface by CompactFlash card interface.
CPU 32-bit RISC ARM720T
Operating frequency: max.50MHz
It is possible to use it by switching the instruction of the length of 32bit and the instruction of the length of 16bit (Thumb code).
32-bit general register: 31
With built-in multipliers
RAM 78KB for CPU, JPEG and ethernet work
Camera input 8-bit paralell interface, YUV4-2-2 input
To resolution about 1600×1200 (UXGA, SXGA, XGA, VGA, QVGA, CIF, QCIF)
For ITU-R BT656 form
JPEG encoder VGA：Max. 30 fps
CIF：30 fps
JPEG Resize function (The screen can be cut out.)
Line Buffer
It is with built-in FIFO changeable of capacity to the JPEG encoder output.
Built-in enhanced DMA
Network 10/100 Base full/half duplex
MII(Media Independent Interface, IEEE 802.3 Clause22 conforming)
Built-in Enhanced DMA
External memory controller 16-bit data bus
supported 2-128MB SDRAM
supported 3-chip select (SDRAM, Flash, others)
CF card interface CF specification Rev1.4 conforming
It is possible to use it as interface such as wireless LAN and PHS cards.
Support of True IDE mode
Standby function HALT function
I/O clock stop function
Timers 16-bit timer×3ch
Reload/Cyclic or one-shot mode
Toggle output or port putput by underflow
Watch dog timer Watch dog timer can output interrupt signal, and can be reset
Serial interface UART: 1ch (16550 software compatible)
UART lite: 1ch (16550 software lower compatoble)
SPI: 1ch (clock synchoronous)
I2C master interface (for camera I/F and general purpose)
I2S interface (for voice/audio data, I2S standard conforming)
Interrupt controller IRQ: 32
FIQ: 2
Real time clock Day, hour, minute and second can be counted
The internal timer tap to 1/128-1/2 can be used as an interrupt source.
The alarm and interrupt function are supported.
GPIO General I/O ports: max.57
(All ports can set the direction to programmable.)
The I/O function and it shares with part.
Power supply for core: 1.8V
for I/O: 3.3V
for PLL: 1.8V
for camera I/O: 2.4-3.6V
Pakage TQFP 144pin, 16×16×1mm/0.4mm pin pitch
Correspondence protocol ARP, ICMP, IP, TCP, UDP, HTTPd, SMTP, DHCP*, FTP*, DNS resolver*,telnet*
It is possible to add and update correspondence protocol by rewriting the flash memory. The addition and the update by the user are also possible.
* sample code
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S1S65010 evaluation board

The evaluation board is prepared so that the customer may develop easily.

S1S65010 evaluation board
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S1S65010 development tool

The following tools are recommended to development and the debugging of the program.

  • ICE: Computex PALM-iCEII
  • Compiler: ARM ADSver1.2
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FAQ

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